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On-Chip Training NPU - Algorithm, Architecture and SoC Design

Bag om On-Chip Training NPU - Algorithm, Architecture and SoC Design

Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.

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  • Sprog:
  • Engelsk
  • ISBN:
  • 9783031342363
  • Indbinding:
  • Hardback
  • Sideantal:
  • 260
  • Udgivet:
  • 28. juli 2023
  • Udgave:
  • 23001
  • Størrelse:
  • 160x20x241 mm.
  • Vægt:
  • 559 g.
  • 8-11 hverdage.
  • 6. december 2024
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Beskrivelse af On-Chip Training NPU - Algorithm, Architecture and SoC Design

Unlike most available sources that focus on deep neural network (DNN) inference, this book provides readers with a single-source reference on the needs, requirements, and challenges involved with on-device, DNN training semiconductor and SoC design. The authors include coverage of the trends and history surrounding the development of on-device DNN training, as well as on-device training semiconductors and SoC design examples to facilitate understanding.

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