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Bag om High Performance Computing

The 5th International Symposium on High Performance Computing (ISHPC-V) was held in Odaiba, Tokyo, Japan, October 20-22, 2003. The symposium was thoughtfully planned, organized, and supported by the ISHPC Organizing C- mittee and its collaborating organizations. The ISHPC-V program included two keynote speeches, several invited talks, two panel discussions, and technical sessions covering theoretical and applied research topics in high-performance computing and representing both academia and industry. One of the regular sessions highlighted the research results of the ITBL project (IT-based research laboratory, http://www.itbl.riken.go.jp/). ITBL is a Japanese national project started in 2001 with the objective of re- izing a virtual joint research environment using information technology. ITBL aims to connect 100 supercomputers located in main Japanese scienti?c research laboratories via high-speed networks. A total of 58 technical contributions from 11 countries were submitted to ISHPC-V. Each paper received at least three peer reviews. After a thorough evaluation process, the program committee selected 14 regular (12-page) papers for presentation at the symposium. In addition, several other papers with fav- able reviews were recommended for a poster session presentation. They are also included in the proceedings as short (8-page) papers. Theprogramcommitteegaveadistinguishedpaperawardandabeststudent paper award to two of the regular papers. The distinguished paper award was given for "Code and Data Transformations for Improving Shared Cache P- formance on SMT Processors" by Dimitrios S. Nikolopoulos. The best student paper award was given for "Improving Memory Latency Aware Fetch Policies for SMT Processors" by Francisco J. Cazorla.

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  • Sprog:
  • Engelsk
  • ISBN:
  • 9783540203599
  • Indbinding:
  • Paperback
  • Sideantal:
  • 588
  • Udgivet:
  • 9. oktober 2003
  • Størrelse:
  • 155x32x235 mm.
  • Vægt:
  • 879 g.
  • 8-11 hverdage.
  • 7. december 2024
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Beskrivelse af High Performance Computing

The 5th International Symposium on High Performance Computing (ISHPC-V) was held in Odaiba, Tokyo, Japan, October 20-22, 2003. The symposium was thoughtfully planned, organized, and supported by the ISHPC Organizing C- mittee and its collaborating organizations. The ISHPC-V program included two keynote speeches, several invited talks, two panel discussions, and technical sessions covering theoretical and applied research topics in high-performance computing and representing both academia and industry. One of the regular sessions highlighted the research results of the ITBL project (IT-based research laboratory, http://www.itbl.riken.go.jp/). ITBL is a Japanese national project started in 2001 with the objective of re- izing a virtual joint research environment using information technology. ITBL aims to connect 100 supercomputers located in main Japanese scienti?c research laboratories via high-speed networks. A total of 58 technical contributions from 11 countries were submitted to ISHPC-V. Each paper received at least three peer reviews. After a thorough evaluation process, the program committee selected 14 regular (12-page) papers for presentation at the symposium. In addition, several other papers with fav- able reviews were recommended for a poster session presentation. They are also included in the proceedings as short (8-page) papers. Theprogramcommitteegaveadistinguishedpaperawardandabeststudent paper award to two of the regular papers. The distinguished paper award was given for "Code and Data Transformations for Improving Shared Cache P- formance on SMT Processors" by Dimitrios S. Nikolopoulos. The best student paper award was given for "Improving Memory Latency Aware Fetch Policies for SMT Processors" by Francisco J. Cazorla.

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