Bøger af ANUPAM CHATTOPADHYAY

The two-volume proceedings constitutes the refereed proceedings of the 24th International Conference on Progress in Cryptology, INDOCRYPT 2023, Goa, India, in December 2023. The 26 full papers were carefully reviewed and selected from 74 submissions. They are organized in topical sections as follows: Part One: Symmetric-key cryptography, Hash functions, Authenticated Encryption Modes; Elliptic curves, Zero-knowledge proof, Signatures; Attacks.Part Two: Secure computation, Algorithm hardness, Privacy; Post-quantum cryptography.

The two-volume proceedings constitutes the refereed proceedings of the 24th International Conference on Progress in Cryptology, INDOCRYPT 2023, Goa, India, in December 2023. The 26 full papers were carefully reviewed and selected from 74 submissions. They are organized in topical sections as follows: Part One: Symmetric-key cryptography, Hash functions, Authenticated Encryption Modes; Elliptic curves, Zero-knowledge proof, Signatures; Attacks. Part Two: Secure computation, Algorithm hardness, Privacy; Post-quantum cryptography.

This story is a romantic tale of the coming of age of Komal, a beautiful, young Indian woman, who works at the Daffodils Inn, situated amongst the verdant grandeur of the hills surrounding Mussoorie, north of New Delhi. Her life and that of her family is steeped in the traditions of an ancient, vibrant culture, which guides them through the vicissitudes of an existence delicately balanced between a simple life of subsistence in the country and the lure of modern civilisation and its opulent trappings.Komal's life becomes inextricably linked with the Sanyal family when they take a vacation at the Daffodils Inn, and Komal begins to feel an inexorable attraction towards the Sanyals' handsome son, Arindam. With the help of Arindam's father, their relationship begins to blossom, and the families of the two young lovers must find a way to unite and blend their differing cultures.

The book covers a range of topics dealing with emerging computing technologies which are being developed in response to challenges faced due to scaling CMOS technologies. It provides a sneak peek into the capabilities unleashed by these technologies across the complete system stack, with contributions by experts discussing device technology, circuit, architecture and design automation flows. Presenting a gradual progression of the individual sub-domains and the open research and adoption challenges, this book will be of interest to industry and academic researchers, technocrats and policymakers.Chapters "e;Innovative Memory Architectures Using Functionality Enhanced Devices"e; and "e;Intelligent Edge Biomedical Sensors in the Internet of Things (IoT) Era"e; are available open access under a Creative Commons Attribution 4.0 International License via link.springer.com.

This book explores energy efficiency techniques for high-performance computing (HPC) systems using power-management methods. Adopting a step-by-step approach, it describes power-management flows, algorithms and mechanism that are employed in modern processors such as Intel Sandy Bridge, Haswell, Skylake and other architectures (e.g. ARM). Further, it includes practical examples and recent studies demonstrating how modem processors dynamically manage wide power ranges, from a few milliwatts in the lowest idle power state, to tens of watts in turbo state. Moreover, the book explains how thermal and power deliveries are managed in the context this huge power range. The book also discusses the different metrics for energy efficiency, presents several methods and applications of the power and energy estimation, and shows how by using innovative power estimation methods and new algorithms modern processors are able to optimize metrics such as power, energy, and performance. Different power estimation tools are presented, including tools that break down the power consumption of modern processors at sub-processor core/thread granularity. The book also investigates software, firmware and hardware coordination methods of reducing power consumption, for example a compiler-assisted power management method to overcome power excursions. Lastly, it examines firmware algorithms for dynamic cache resizing and dynamic voltage and frequency scaling (DVFS) for memory sub-systems.

This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors.

Increasing complexity of modern embedded systems demands system designers to ramp up their design productivity without compromising performance goals.

Increasing complexity of modern embedded systems demands system designers to ramp up their design productivity without compromising performance goals.