Applied Digital Logic Exercises Using FPGAs
indgår i IOP Concise Physics serien
- Indbinding:
- Hardback
- Sideantal:
- 168
- Udgivet:
- 3. oktober 2017
- Størrelse:
- 178x11x254 mm.
- Vægt:
- 513 g.
- 2-3 uger.
- 10. december 2024
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- 1 valgfrit digitalt ugeblad
- 20 timers lytning og læsning
- Adgang til 70.000+ titler
- Ingen binding
Abonnementet koster 75 kr./md.
Ingen binding og kan opsiges når som helst.
Beskrivelse af Applied Digital Logic Exercises Using FPGAs
FPGAs have almost entirely replaced the traditional Application Specific Standard Parts (ASSP) such as the 74xx logic chip families because of their superior size, versatility, and speed. For example, FPGAs provide over a million fold increase in gates compared to ASSP parts. The traditional approach for hands-on exercises has relied on ASSP parts, primarily because of their simplicity and ease of use for the novice. Not only is this approach technically outdated, but it also severely limits the complexity of the designs that can be implemented. By introducing the readers to FPGAs, they are being familiarized with current digital technology and the skills to implement complex, sophisticated designs. However, working with FGPAs comes at a cost of increased complexity, notably the mastering of an HDL language, such as Verilog. Therefore, this book accomplishes the following: first, it teaches basic digital design concepts and then applies them through exercises; second, it implements these digital designs by teaching the user the syntax of the Verilog language while implementing the exercises. Finally, it employs contemporary digital hardware, such as the FPGA, to build a simple calculator, a basic music player, a frequency and period counter and it ends with a microprocessor being embedded in the fabric of the FGPA to communicate with the PC. In the process, readers learn about digital mathematics and digital-to-analog converter concepts through pulse width modulation.
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